SerDes IP

SerDes IP

High-end SerDes:

  • HDMI 2.0 SerDes with schematics and better than spec noise and jitter . Meant for edge or 20 cm inside the board !? upcoming HDMI2.1 SerDes .
  • UCIe @ 32 gig
  • PCIe gen6
  • Automotive grade Gigabit Ethernet PHY ( 10/100/1000Base-T)
  • Four channel multi-protocol SERDES operating up to 6.5Gbp ; 12.5Gbp in 16nm TSMC with schematics.
  • 56 Gig PAM4 and 112 Gig PAM16 available with schematics one year from contract closure.
  • High-end PLLs from 40MHz to 10GHz bands with very low jitter available with schematics

 

MIPI PHY for D and C and M with complete ecosystem including controller and test platforms.

MIPI M and D PHY IP with the largest share of MIPI market . These IPs are best-in-class for power, area, and testability features. We not only has an End to end solution with silicon proven IP down to 28 nm, but also an eco-system with best-in-class MIPI supply-chain stake-holder With over 20 announced MIPI licensees. We also provide MIPI Platforms for both M and D MIPI PHYs for an end to end over the wire solution to enable the customer in one week to port the IP in the platform and provide proof of concept to their customers. We can also offer you an FPGA based platform so that you can port your GDSII into it for test, verification and/or demo to your end customers.