IP Semantics

SerDes, PLL, CK and OSC

High-end SerDes : such as 2.5 Gig and 17.5 Gig SerDes XAUI/RXAUI/SGMII; XAUI/RXAUI/HRIF/SFI4.2/SFI5.1 in 40nmG process that can operate from 1.25 to 6.25Gbps;10 Gig SONET; GPON SerDes with much lower than spec jitter and power. USB4.0 , 32 Gig UCIe , MIPI PHYs, C, D and M and A PHY for automotive
High-end but low spur low jitter PLLs : from 40MHz to 10GHz bands
Analog IPs such as :ADC, DAC, AFE, LDO, BG, PTV, glitch detector

Power Management IP

We can provide you an stand alone IP or integrate our Power management IP isle into your ASIC . We provide the following power management IPs:

Low Dropout (LDO) Voltage Regulators
DC-DC Switching Converters
- Buck, Boost, Bypass (Glitch-Free Switching)
- Inductor-Based – Separate Inductor Required

Voltage References
- High-Accuracy Bandgap References
- Low-Power Voltage References
Additional Analog Circuitry
- Battery Chargers
- Power-on Reset Function
- Voltage & Current Monitors
- Analog To Digital Converters (ADCs)
- Digital To Analog Converters (DACs)
- Temperature Sensors
- Oscillators
- Comparators
- Power Switches