Full ASIC design services

  • Full turn key ASIC design services plus IPs in high speed design.
  • Mixed signal ASIC services
  • Coherent NOC IP + L3 cash IP in combination with cash coherency expertise
  • Full Power management IP in 7 nm
  • Physical Design Team of 100+ PD Engineers with 75% Team experienced in “FinFET”
  • Die-Sizes as large as 325 mm^2 with Complex SoC Implementation
  • Both Full Chip and Block Level Implementation.  Good at STA, PV, IR Signoff Checks
  • Strong knowledge of SV/UVM Methodologies ; Wireless, Media, Auto, IoT Domain Expertise
  • Design IP Team Peripheral, Bus and Security IP